FIG. 6 is a block diagram showing the circuit arrangement of a conventional intelligent power module (IPM). The IPM shown in FIG. 6 has a single phase for the sake of convenience in explanation although an ordinary IPM has three phases.
In FIG. 6, reference numerals 11-14 denote insulated gate bipolar transistors (IGBTs) as semiconductor switching devices connected in a bridge connection to constitute a pulse width modulator (PWM) inverter for example; 21-24, freewheeling diodes (FWD) connected to the IGBTs 11-14 in reverse parallel; 31-34, drive circuits for driving the IGBTs 11-14; 61-64, control circuits for controlling the IGBT drive circuits 31-34; 411, 421, 431 and 441, overcurrent detecting circuits for detecting overcurrent flowing through the IGBTs 11-14 when upper and lower arms are shorted or the output terminals are grounded; 412, 422, 432 and 442, overheat detecting circuits for the IGBTs 11-14; 413, 423, 433 and 443, drive voltage drop detecting circuits for detecting a drop in control power supply voltage required for driving the IGBTs 11-14; and 51-54, abnormal condition detecting logic devices for transmitting a cut-off signal to the drive circuits 31-34 via the control circuits 61-64 and outputting an alarm signal to the outside. In a main circuit of the inverter, symbols P and N indicate direct current input terminals and symbols U and V indicate alternating current output terminals.
In FIG. 6, the control circuits 61-64 turn on and off the IGBTs 11-14 through the IGBT drive circuits 31-34 according to a signal (control signal) from an isolated type signal transmission device, not shown, such as a photo-coupler that performs photo-isolation.
As stated previously, upon detection of at least one abnormal condition detecting signal from the detecting circuits, the abnormal condition detecting logic devices 51-54 determine that a condition is fatally abnormal (major failure) and then cut off the IGBTs 11-14 through the IGBT drive circuits 31-34. In this case, all the IGBTs 11-14 may be cut off according to an output signal from one of the abnormal condition detecting logic devices.
The abnormal condition detecting logic devices 51-54 then output alarm signals from an alarm signal output terminal 130 via the control circuits 61-64 in order to inform the outside of the abnormal condition. As a safety precaution, the alarm signals are outputted to the outside after they are isolated by the photo-coupler or the like.
In FIG. 6, only the abnormal condition detecting logic devices 51, 53 in the lower arm output the alarm signals through a wired OR; however, the abnormal condition detecting logic devices 52, 54 may also output abnormal condition detecting signals as alarm signals that are isolated in advance.
Another known a metal oxide semiconductor (MOS) gate driver circuit disclosed is in Japanese Patent No. 2,886,495. This MOS gate driver circuit is used for a high voltage switching circuit and is capable of detecting overcurrent, cutting off devices and outputting an alarm signal indicating the overcurrent.
According to the prior art shown in FIG. 6, only one kind of alarm signal is outputted. For this reason, if the IPM has three phases, it is impossible to recognize from the outside which phase among the six IGBTs and the freewheeling diodes is exposed to what kind of abnormal condition. The recognition of a position (e.g. phase and device) under the abnormal condition and factors contributing to the abnormal condition makes it easier to eliminate those factors. Accordingly, it would be desirable to output signals indicating a position under an abnormal condition and abnormality factors.
Moreover, the detection of a precursory phenomenon of a fatal abnormal condition enables a trip-free operation (i.e. an operation in which the devices are not cut off). Accordingly, it would be desirable to discriminate the abnormality factors. In the trip-free operation, for example, a warning signal is outputted when the temperature of the IGBT exceeds a slightly lower value than a threshold value at which the temperature of the IGBT is fatally abnormal. When the warning signal is outputted, the maximum value of current flowing through the devices is restrained or the frequency of carriers is lowered. This prevents the increase in temperature of the IGBT to a fatally abnormal level, thereby protecting the IGBT from overheating.
If, however, the abnormality factors are discriminated according to the abnormal condition detecting signals as alarm signals outputted from the respective phases, it is necessary to provide a large number of output terminals for outputting the alarm signals and to provide a large number of isolation photo-couplers as a safety precaution. This results in a high cost.
Further, the construction of a system must be changed in order that the IPM capable of outputting various kinds of alarm signals according to abnormality factors, and in order that the system is compatible with the conventional IPM capable of outputting only one kind of alarm signals.
In addition, the MOS gate driver circuit disclosed in the Japanese Patent No. 2,886,495 detects an overcurrent flowing through devices and outputting alarm signals indicating the overcurrent, but does not detect other abnormality factors or a precursory abnormal condition.
It would also be desirable to provide an IPM that is compatible with the conventional system which does not discriminate abnormality factors, and that is capable of outputting various kinds of abnormality factors when there is a request from the outside to discriminate various kinds of abnormality factors contributing to a fatal abnormal condition and a precursory abnormal condition.
It would further be desirable to provide an IPM that is capable of outputting alarm signals indicating a fatal abnormal condition and warning signals indicating a precursory abnormal condition from separate output terminals or the same output terminal and then discriminating abnormality factors according to combinations of logic states of those output signals.